EE410 begins! Here's the chedule for this week....

Greetings Labmembers:

It's that time of year again,when EE410 descends on the lab....

For those of you who don't know, EE410 is a very challenging class in which the students fabricate, model, and test a
CMOS device (for more info, check out the class website at http://www.stanford.edu/class/ee410). The schedule for processing this
device is aggressive -- and we ask for your patience over the next 6 weeks as priorities and equipment access may be shifted in order to
allow full support for this class.

The schedule for the lab sections (which will also be posted on the calendar outside the gowning room) is as follows:

Tuesday 1-5: Dawson Wong (Coral name: djwong)
Wednesday 8-12: Caner Onal (Coral name: caner)
Wednesday 1-5: Dawson Wong(Coral name: djwong)
Thursday 1-5: Duygu Kuzum (Coral name: duygu)

Unlike before, this year, the EE410 device will be done on the asml. We have reserved the asml and svgcoat/svgdev tracks for the entire four hours of each lab section.
We anticipate the tools will be available for general lab use during these times, but please respect that EE410 has priority use during lab sessions.

We apologize for any an impact these activities may have on access to key lab equipment -- and will make every effort to give advance warning about our
scheduling of high use tools.

If you have any questions, comments, or suggestions, please get in touch with the lab TA's or your favorite staff members.

Just as a heads up -- For next week, the lab sections will be performing diffusion operations, so will be processing through gasonics, wbnonmetal, wbdiff, and tylans.

Thanks for your attention --

Your SNF Staff

--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu